WHAT IS FAILURE ANALYSIS

Things don’t always work the way they should – in life, love, and manufacturing. Regardless of what we hope or even expect, no one has a 0% defect rate. When they fail, finding out what went wrong helps us to deal with today’s problem and prevent it from happening again. Technically the term is “Failure Analysis”.

When a product does not function correctly, a failure analysis is conducted to determine the source of the failure. In electronics, the source of the failure, or failure mode, could be an application induced failure component, the workmanship of the PCBA (printed circuit board assembly), a component including the PCB (printed circuit board), or even a design fault. The objective of failure analysis is to determine the source so that the problem can be resolved

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HOW ARE THEY PRODUCED?

Common failure modes include metal etching defects, solderability failures, electrical overstress (EOS) and electrostatic discharge (ESD) controls, die damage, broken bond wires, shorts on the PCBA, delamination in the PCB, and lifted vias or bond pads on the PCBA. (See Figure 1)

The majority of component failures are identified during production testing, but a small percentage are not detected and result in field failures. Many of us struggle to accept that product directly from an OCM (original component manufacturer) or their authorized distributors can be defective. Most people assume that product with traceability is 100% okay and the only source for a problematic part would be counterfeit or otherwise defective product from the open market. (See Figure 2)

A survey of Authorized Distributors, however, shows that while they have less than 1% reject/return rates, when the number of shipments is factored, problems are common. Authorized distributors can go back to the manufacturer for support on failure analysis; however, many OCM take an average of 2-3 weeks to complete a Failure Analysis, plus shipping and information gathering pushes it out to a month or longer. Further, OCM tend to reach a conclusion that the problem is EOS either in handling or assembly and, therefore, not their responsibility. Our analyses show frequently that a lot of these failures are problems from the OCM and require screening or isolation of date or lot codes and countries of origin.

ISOLATING THE PROBLEM

The PCBA assembly process is to complete a first article, meaning a small sample of boards are assembled, inspected, and tested before a complete production lot is run. In-process inspection is usually done by an AOI (automated optical inspection) system that verifies the components have been placed and that their orientation is correct. The boards may also be inspected manually for workmanship like solder bridges, cold solder, damaged components, location of the components on the pads, and excess contamination such as flux residue. The IPC-610A standard sets the criteria.

The first level of electrical testing is ICT (in-circuit testing), sometimes called “bed-of-nails” testing. According to the schematic drawing for the assembled board, there are specific amounts of electricity flowing through the board and ICT measures where there is excess or insufficient power, identifying a problem.

The next step in production testing is FT (functional testing), where the PCBA is connected to an application sample and the core functions of the product are tested. Any failures in ICT or FT are examined. ICT provides a specific location for the failure, while FT identifies a failure mode. Failure mode is what function did not work correctly. An engineer or technician then completes a board-level diagnostic (PCB troubleshooting) to find the source of the failure. If a component is suspected to be the source, the solder joint is examined to make sure there is a good connection between component and PCB.

If the solder joint is good, a swap test is conducted, which is simply replacing the component with a new device. If the application then works, we know it’s the component.

A typical component-level failure analysis would go according to the following flow. A complete failure analysis requires several samples of the parts that were reported as failed, several unused samples from the same lot, and several samples from a known-good lot (also known as golden samples) in addition to all available information on how the problem was detected and the component identified as the source.

We follow a step-by-step analysis but how deep into the process we will need to dig is unknown at the outset of each job. The process is designed to eliminate the most common failure modes first and progressing through to the most obscure. The problem may be very easy to identify, or it may be very fine and require many levels of examination to find the problem.

THIRD-PARTY ADVANTAGES

The White Horse Laboratories’ Failure Analysis Engineering Team boasts highly trained professionals from OCM such as Texas Instruments and STMicroelectronics. This expert team armed with a complete array of equipment provides fast, reliable and independent analysis.

Faster! OCM take 3-4 weeks including shipping and we complete uninterrupted analyses in an average of 5 days.

Unbiased Results! As an independent third party, our only interest

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